Full name:                 BUI THI THANH THANH

Date of birth:            03/07/1988

Place of birth:           Danang, Vietnam

Nationality:               Vietnamese

Work address:         Faculty of Information Technology, University of Science and Technology – The University of Danang

54 Nguyen Luong Bang Street, Lien Chieu District, Danang, Vietnam

Work position:         Lecturer

E-mail:                      bttthanh@dut.udn.vn

EDUCATION

2018:  Doctor of Engineering

Institution: The University of Adelaide, Australia

Major: Electronics and Computer Engineering

2014: Master of Engineering

Institution: RMIT University, Australia

Major: Electronics and Computer Engineering

2011: Bachelor

Institution: University of Science and Technology, The University of Da Nang, Vietnam

Major: Electronics and Telecommunication Technology

WORK EXPERIENCE

·    2014-present: Lecturer at Faculty of Information Technology, Danang University of Science and Technology – The University of Danang, Vietnam. 

COURSES TAUGHT AT UNIVERSITY

·      Computer Architecture and Microprocessors

·      Microcontrollers

·      Embedded System Programming

·      Projects on Computer engineering

RESEARCH INTERESTS

·      Embedded Systems and IoTs

·      FPGA Implementation of AI Algorithms

RESEARCH PROJECTS

·     Implementation of a Scalable Network-on-Chip Based Neural Network on FPGAs

Grantor: University of Science and Technology – The University of Danang

Duration: 3/2019-03/2020, Status: On-going, Role: Main researcher

·     Design of a Network-on-Chip Based Microprocessor

Grantor: University of Science and Technology – The University of Danang

Duration: 01/2014-12/2014, Status: Completed, Role: Principal Investigator 

RECENT PUBLICATIONS 

[1]  X. T. Hoang and T. T. T. Bui, “Implementation of an AI system recognizing and predicting unusual power consumption of customers”, in Proceedings of CITA 2022, pp. 72–82, Hue, Vietnam, 2022.

[2] T. T. T. Bui and B. Phillips, "A Scalable Network-on-Chip Based Neural Network Implementation on FPGAs," in Proceedings of 2019 IEEE-RIVF International Conference on Computing and Communication Technologies, pp. 1-6, Danang, Vietnam,  2019.

[3]  T, T. T. Bui, “Interconnect architectures for dynamically partially reconfigurable systems", 2017. 

[4] T. T. T. Bui, B. Phillips and M. Liebelt, “A Dynamically Reconfigurable NoC for Double-Precision Floating-Point FFT on FPGAs”, in Proceedings of The Ninth International Conference on Advances in Circuits, Electronics and Micro-electronics, pp. 52–57,  Nice, France, 2016.