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Số người truy cập: 74,987,272

TRONG NƯỚC:
[1]Bài báo: A Novel Parallel DTC Segmentation Scheme for Fractional-N Digital PLLs. Tác giả: Tuan Minh Vo. Journal of Science and Technology: Issue on Information and Communications Technology. Số: 18. Trang: 1-7. Năm 2020. (May 5 2020 2:52PM)
QUỐC TẾ:
[1]Article: Analysis of Frequency-Aid Technique for Fractional-N Digital BB-PLLs in Time-Domain. Authors: Tuan Minh Vo. IEEE Transactions on Circuits and Systems II: Express Briefs. No: 0. Pages: 1-5. Year 2020. (Apr 3 2020 1:35PM)
[2]Article: A Non-Overlapping Frequency Aid Technique for Fractional-N Digital Bang-Bang PLLs
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Authors: Tuan Minh Vo. 2019 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS). No: 0. Pages: 1-4. Year 2019.
(Nov 10 2019 4:02PM)
[3]Article: Analysis of LMS Gain Variation in DTC-Based Fractional-N Digital PLLs
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Authors: Tuan Minh Vo. 2019 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia). No: 0. Pages: 5-8. Year 2019.
(Nov 10 2019 4:05PM)
[4]Article: A novel LMS-based calibration scheme for fractional-N digital PLLs. Authors: Tuan Minh Vo, Carlo Samori, Salvatore Levantino. 2018 IEEE International Symposium on Circuits and Systems (ISCAS). No: 000. Pages: 1-4. Year 2018. (May 18 2018 8:33PM)
[5]Article: A novel segmentation scheme for DTC-based ΔΣ fractional-N PLL. Authors: Tuan Minh Vo, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino. 2017 IEEE International Symposium on Circuits and Systems (ISCAS). No: 10.1109/ISCAS.2017.8050285. Pages: 1-4. Year 2017. (Nov 6 2017 6:57PM)
[6]Article: An automatic dynamic range adaptation algorithm for capacitive sensor interface circuits. Authors: Tuan Minh Vo, Akira Matsuzawa. 2017 IEEE European Conference on Circuit Theory and Design (ECCTD). No: 10.1109/ECCTD.2017.8093283. Pages: 1-4. Year 2017. (Nov 6 2017 7:01PM)
[7]Article: Analysis of Fractional-N Bang-Bang Digital PLLs using Phase Switching Technique. Authors: Tuan Minh Vo, Salvatore Levantino, Carlo Samori. 2016 IEEE 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME). No: 16176894. Year 2016. (Aug 27 2016 1:17AM)
[8]Article: A 10-bit, 290fJ/conv. steps, 0.13mm2, Zero-Static Power, Self-Timed Capacitance to Digital Converter. Authors: Tuan Minh Vo, Yasuhide Kuramochi, Masaya Miyahara, Takashi Kurashina, Akira Matsuzawa. SSDM Conference 2009. No: C-2-4. Pages: 78-79. Year 2009. (Mar 26 2014 5:07PM)
[9]Article: Asynchronous Differential Capacitance-to-Digital Converter for Capacitive Sensors. Authors: Tuan Minh Vo, Yasuhide Kuramochi, Masaya Miyahara, Takashi Kurashina, Akira Matsuzawa
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. Workshop on Synthesis And System Integration of Mixed Information technologies. No: 15th. Pages: 456 - 461. Year 2009. (Mar 26 2014 5:14PM)
[10]Article: Design of Low-Power Medical Devices. Authors: Kenichi Mastunaga, Tuan Minh Vo, Satoshi Furuya, Takashi Kurashina, Akira Matsuzawa. IEICE technical report. No: 108 (347). Pages: 55 - 57. Year 2008. (Sep 3 2019 12:17PM)
  
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